SSD NAND Endurance

[idata]

Can this be true?

http://translate.google.com/translate?hl=en&sl=zh-CN&u=http://www.pceva.com.cn/html/2011/storgetest_... This site experimented to see how much data could be written to an X25-V before the NAND expired. They wrote to the device 24/7. (Seems they paused once every 12 hour to run TRIM from the toolbox).

Translation makes it hard to understand exactly how they ran the experiment, but they state:

A class (Sequential?)

• 10~100KB 80% 10 ~ 100KB 80% (System thumbnails and the like)
• 100~500KB 10%100 ~ 500KB accounted for 10% (JPG images and the like)
• 1~5MB 5% 5% 1 ~ 5MB (big picture, MP3 and the like)
• 5~45MB 5% 5% 5 ~ 45MB (video clips and the like)

Where B is random write categories: (Random?)

• 1~100 100% 1 to 100 bytes of 100% (System log and the like)

In total there were able to achieve 0.73PB in 6,185 hours! That is a phenomenal amount of writes, which appears to be way over spec of 20GB of host writes per day for a min of 5 years.

Here is http://botchyworld.iinaa.net/ssd_x25v.htm another one 0.86PB in 7,224 hours!

Does that come down to the work load or are Intel specs extremely conservative?

[idata]

Thank you for the link, which is very interesting.

There are of course a wide range of variables to how wear can be induced. Our experiment has tried as far as possible to replicate a realistic work load, with a reasonable amount of free space and a reasonable amount of static data.

I appreciate that accelerated testing introduces additional wear that would not otherwise occur. Looking at the white paper that impact might be significant. That said the drives are performing admirably, so hopefully it helps dispel concerns about SSD durability.

Based on the 20GB a day write "allowance" over 5 years these drives are experiencing ~150 days wear in one day!

Already the 320 has exceeded 35TB and the wear out indicator is still at 82%. The X25-V is at ~30TB and the wear out indictor is at 83%. So far it would seem that 25nm NAND (320) is holding up very well compared to the X25-V (34nm), which would suggest that it's not just NAND PE cycles are being accessed.

If I may could I please ask a few questions?

• Does static data have to be refreshed periodically? (For data retention not wear levelling)
• If so how often?
• Does the 320 enable static wear levelling?
• On what basis are the PE cycles specified? (i.e. lowest or average)

Thank you.

[idata]

Already the 320 has exceeded 35TB and the wear out indicator is still at 82%. The X25-V is at ~30TB and the wear out indictor is at 83%. So far it would seem that 25nm NAND (320) is holding up very well compared to the X25-V (34nm), which would suggest that it's not just NAND PE cycles are being accessed.

Recall that the # of cycles that the Nand will see is a function of the host cycles multiplied by the "Write Amplication" factor. Think of this as the term as the efficiency of the drive in defragging/garbage collecting. Assuming that both drives have the exact same workload and that the Flash has the same endurance, then the difference in the Wear Out Indicator reflects the difference in Write Amplication.

• Does static data have to be refreshed periodically? (For data retention not wear levelling)

• If so how often?

That would depend on the data retention capabilities of the component Nand chips. If the component data retention is sufficient, then it would seem unnecessary to periodically refresh static data.

However, keep in mind that wear leveling may end up refreshing the static data automatically. If the "hot" data gets cycled very fast, then the SSD may move the static data to a high cycle count block on the Nand and use the low cycle block previously holding the static data for additional host writes.

For more details on SSD endurance qualification, you can refer to the recently published JEDEC specs:

http://www.jedec.org/standards-documents/results/jesd218%20taxonomy:2506 http://www.jedec.org/standards-documents/results/jesd218%20taxonomy:2506

On what basis are the PE cycles specified? (i.e. lowest or average)

Lowest. The details of the qualification standards for the Nand component can be found in the JEDEC JESD47 spec:

http://www.jedec.org/sites/default/files/docs/JESD47H-01.pdf http://www.jedec.org/sites/default/files/docs/JESD47H-01.pdf

[idata]

Thank you for your kind reply. Much appreciated.

[idata]

Do you not need to refres static data every once in a while because of read disturb?

[idata]

Do you not need to refres static data every once in a while because of read disturb?

Read disturb refers to the property of Nand that the more a block of Nand is read, the more errors are introduced. A brief note about Read Disturb (and other various Nand properties) are discussed in this technical note from Micron:

http://download.micron.com/pdf/technotes/nand/tn2917.pdf http://download.micron.com/pdf/technotes/nand/tn2917.pdf

Static data that is read frequently will eventually need to be refreshed or relocated before it reaches the Read Disturb limit because of this Read Disturb property.